Data processing systems are used in myriad applications which touch virtually every aspect of life. In applications where the data processing system uses battery power for any substantial length of time, it is particularly desirable to be able to minimize the power consumption of the data processing system. Examples of systems wherein battery power is used for substantial periods of time include portable data processing systems such as notebook and sub-notebook computer systems, and data processing systems which are employed in remote locations, hazardous weather areas, or earthquake prone areas.
In applications which require high performance from a data processing system, the high performance requirement often presents a heat dissipation problem. As a result, most high performance data processing devices use expensive packages such as ceramic pin grid arrays in order to provide heat dissipation capabilities adequate to avoid overheating the data processing device.
In addressing the power management issues presented by the above-described circumstances, it is known that the power dissipation of a data processing system having a fixed operating voltage is given by the following equation : EQU P=CV.sup.2 f,
where P is the power dissipated, C is the effective power dissipation capacitance, V is the operating voltage and f is the effective transition frequency. Thus, the dissipated power P can be reduced by reducing the effective transition frequency f.
In one known approach to reducing the effective transition frequency f, a data processing device can divide down its own clock frequency in response to an external stimulus. For example, one known conventional RISC microprocessor has a reduced power mode of operation wherein it responds to an external stimulus to reduce its internal clock frequency by 75%.
Prior clock switching circuits generally operate by dividing the frequency of a master oscillator so that synchronous operation is maintained, or by stopping the processor prior to switching between asynchronous clock sources. Other switching circuits rely on switching between a high frequency clock and a low frequency clock in order to mask "glitches" produced when the high frequency clock is switched asynchronously.
Accordingly, it is an object of the invention to provide a clock switching circuit for switching between asynchronous clock sources while the processor remains in operation.
Another object of the invention is to provide clean, "glitchless" switching between asynchronous clock sources which have frequencies which may be relatively close to each other.
Other objects and advantages will be apparent to those of ordinary skill in the art having reference to the following figures and specification.